DTU 02208
02208 Test of Integrated Circuits
Assignment Schedule Autumn '2
Assignment #1:
Delay Test
Schedule:
Date of issue: 17 September
Report due: 11 October (*note*)
Date of presentation: 25 October
Literature:
Assignment answer
presented by
Team 1
Assignment critique presented by
Team 4
Assignment #2:
Partial Scan Design Using IEEE 1149.1
Schedule:
Date of issue: 24 September
Report due: 22 October
Date of presentation: 1 November
Literature:
Assignment answer
presented by
Team 2
Assignment critique presented by
Team 1
Assignment #3:
Design for Test of Embedded Microprocessors
Schedule:
Date of issue: 1 October
Report due: 29 October
Date of presentation: 8 November
Literature:
Assignment answer
and
Presentation
presented by
Team 3
Assignment critique presented by
Team 2
Assignment #4:
Bridging Faults
Schedule:
Date of issue: 8 October
Report due: 5 November
Date of presentation: 15 November
Literature:
Assignment answer
presented by
Team 4
Assignment critique presented by
Team 3
Associate professor Flemming Stassen,
stassen@imm.dtu.dk
