Imprecise Arithmetic

Sometimes reducing the power dissipation of resource constrained electronic systems is a top priority. In signal processing, it is possible to have an acceptable quality even introducing some errors.
Degrading precision arithmetic
Degradation is applied dynamically (at run-time)
  • Disabling the lower (least-significant) portion of the datapath either by clock-gating or by forcing zeros.
  • Lowering the supply voltage (VDD) and re-designing the carry-chains in the datapath to adapt to the increased delays.
  • Disabling logic by power gating.
Sloppy arithmetic
Perform basic operations (e.g. addition and multiplication) in an imprecise manner by simplifying the hardware implementation to obtain a reduction in delay, area and power dissipation.
Original images
JPEG decompressed (sloppy)

Work in the area

Modified by Alberto Nannarelli on Sunday November 06, 2016 at 18:10