Master's Thesis Topics

Here a list of possible topics for Master's theses. If you have your own project related to real-time systems or embedded Java just drop me a note and we can meet for a discussion.

WCET Analyzer for Patmos

Patmos is a time-predictable processor that is especially designed to simplify worst-case execution time (WCET) analysis. The project is about to design a WCET analyzer that targets the Patmos architecture. This project can build on a tool called platin that supports some of the WCET analysis already. It can be an extnesion of platin, or a rewrite from scratch.

Patmos compiler optimization for dual issues.

The current version of the LLVM compiler for Patmos is not very optimized for the dual-issue of Patmos. The dual-issue version of Patmos is just about 10% faster than the single-issue version. Software pipelining and superblock scheduling should increase the performance by by an estimated 30% when the program is not memory bound.

JavaScript on Patmos

Patmos is a processor for embedded real-time systems, which often execute on the bare metal without an operating system. Such applications are often written in C and C has the usual issues of a low-level language. Using a scripting language for at least part of the application improves the safety of the application. Within this thesis project a JavaScript runtime is ported for Patmos and an example application executing on an FPGA demonstrates the system. As an extension the Accessor project, which uses JavaScript, for the future Internet-of-Things can be explored.

Transactional Memory on T-CREST

Transactional memory (TM) is a promising mechanism for synchronizing access to shared data. TM is usually developed to optimize the average case. In this thesis a real-time TM (RTTM) will be developed within the T-CREST multicore platform that is optimized for real-tie systems. The project can start on a RTTM version for the multicore version of JOP. (Read up what Augsburg is doing.)

Porting of a Real-Time Operating System to the T-CREST Platform

T-CREST is a research project on time-predictable multiprocessing. In this Master thesis an RTOS (such as FreeRTOS) will be ported to the processor Patmos and the T-CREST platform.

Further Topics

 * A multithreaded Patmos (to compare against CMP/VLIW)
 * Explore Scala for RTS
 * Enhance TiCOS to support multiple cores and to use the Argo NoC
 * Compare OpenSoC with Argo
 * CompCert C backend for Patmos
 * RISC V FPGA implementation
 * Out-of-order executing Patmos

Bachelor Project Topics

Here a list of projects for Bachelor's theses. Your suggestions are also welcome. A Bachelor project can also be extended to a Master project.

JavaScript Simulator of Patmos

Patmos is a processor for embedded real-time systems, developed here at DTU and used in advanced computer architecture teaching. The project is to develop a Patmos instruction set simulator in JavaScript so it can execute in any browser. This project should be similar to the Venus RISC-V simulator at
A useful tool will be:

RISC-V Pipeline Simulator

We intend to use RISC-V in the future for teaching Computer Architecture Engineering. For this we need a pipeline simulator of RISC-V. The pipeline simulator shall provide a standard 5-stage pipeline that executes RISC-V base instructions and show graphically what instructions are doing in each stage. As a start we provide a instruction set simulator of RISC-V (about 200 lines of code).

RISC-V on the DE2-115 FPGA

Implementation of the RISC-V Rocket chip on the DE2-115 FPGA board. The standard distribution o Rocket uses a Zynq board and help from the ARM processor to start. this project is about untethering Rocket and make it boot without the help of an additional processor.

SD card interface to Patmos

An SD card is a convenient storage device for embedded systems. Within our Patmos processor project (<>) we are missing a file system. The project is to interface an SD card to Patmos and writing or porting a simple file system library for Patmos.

Accelerator Interface for Patmos

Patmos is a RISC processor for real-time systems. For performance and time predictability reasons often algorithms are implemented directly in hardware. This project is about extending Patmos with an interface standard for hardware accelerators (coprocessors). One interface to be explored is a command to the accelerator that may include two register values and a destination register number on a write and a register value (or more in sequence) on a read. This interface is mapped to two custom instructions. The interface shall be demonstrated with a small accelerator. References: RoCC interface of the Rocket/RISC-V project.

uCLinux on Patmos

Patmos is a processor optimized for real-time systems. It is a time-predictable RISC processor. The current application environment is executing applications written in C on bare metal. uLinux is a stripped down version of Linux that is intended for micro controllers. The proposed project is to port uLinux to Patmos.

OCaml on Patmos

OCaml has been ported to a Raspberry Pi (<>), so it should be possible to execute it on Patmos.

TinyOS on Patmos

TinyOS is a small operating system mainly for wireless sensor network nodes. As it is a very small OS it is a very good fit for an embedded processor like Patmos. Patmos is a small real-time processor that can be a good architecture for low-power devices. The project is about porting this OS to Patmos and exploring it with small examples. Optionally the TinyOS functions can be analyzed for the worst-case execution time (WCET) with the WCET analysis tool of Patmos.

A Simple Hardware Simulation Framework

One of the standard frameworks for hardware simulation is SystemC. However, SystemC is quite verbose and an overkill for the simulation of simple pipelines (such as a processor). In the project a simple simulation framework for pipelined hardware shall be developed in Java or Scala. The main focus is on a small, easy to use framework and not on many features. As evaluation of the framework the Patmos VLIW processor shall be implemented on top of the framework.