[1] Andreas Borup Svendsen. Fast FPGA-based processing of measurement data from scattering experiments . Master's thesis, Department of Applied Mathematics and Computer Science, Technical University of Denmark, 2014. Collaboration with Department of Physics, Technical University of Denmark.
[2] Luca Pezzarossa. Hardware Accellerators in Network-on-Chip Based Multi-Core Platforms. Master's thesis, Department of Applied Mathematics and Computer Science, Technical University of Denmark, 2014. IMM-M.Sc.-2014-xx.
[3] Dean Roy Humphreys. Enhancing Embedded Data Acquisition using Zync SoC. Master's thesis, Department of Applied Mathematics and Computer Science, Technical University of Denmark, 2014. (Formal collaboration with Prevas A/S.).
[4] Ioannis Kotleas. Mode changes in network-on-chip based multiprocessor platforms. Master's thesis, Department of Applied Mathematics and Computer Science, Technical University of Denmark, 2014. .
[5] E. Lakis. FPGA implementation of a time predictable memory controller for a chip-multiprocessor system. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2013. IMM-M.Sc.-2013-xx.
[6] P. Engkjær. Asynchronous Digital Control Circuit for Class-D Audio Power Amplifier. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2012. IMM-M.Sc.-2012-xx (Formal collaboration with Merus Audio ApS.).
[7] R.B. Sørensen. Programming of the T-CREST real-time multi-processor platform. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2012. IMM-M.Sc.-2012-xx.
[8] C.G. Sørensen and M.S. Ibsen. Time-synchronization in real-time distrubuted FPGA-systems using IEEE-1588 and redundant Ethernet. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2011. IMM-M.Sc.-2011-xx (Formal collaboration with MAN Diesel & Turbo A/S).
[9] R. Madsen. Desynchrinization of digital circuits. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2011. IMM-M.Sc.-2011-32.
[10] M. R. Jensen. Design of a hardware network address translation unit for a single chip high-speed ethernet router. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2009. IMM-M.Sc.-2009-27 (Formal collaboration with Vitesse Semiconductor Corporation Denmark).
[11] M. Djernæs. Code protection on programmable audio processors. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2008. IMM-M.Sc.-2008-54 (Double degree program w. Texas Tech University. Collaboration w. Texas Instruments Inc.).
[12] J. N. Lassen. Fpga prototyping of asynchronous networks-on-chip. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2008. IMM-M.Sc.-2008-26).
[13] M. E. Solgaard. Micro transducer controller. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2007. IMM-Thesis-2007-31 (Formal collaboration with Bang & Olufsen ICEpower a/s).
[14] J. S. Olsen. Soc design for an audio system. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2007. IMM-Thesis-2007-04 (Double degree program w. Texas Tech University. Collaboration w. Texas Instruments Inc.
[15] C. P. Pedersen. Virtual Circuits in Network-on-Chip. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2006. IMM-Thesis-2006-87.
[16] M. B. Stuart. High-Level Modeling of Networks-on-Chip. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2006. IMM-Thesis-2006-83.
[17] M. S. Rasmussen. Network-on-Chip in Digital Hearing Aids. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2006. IMM-Thesis-2006-76 (Formal collaboration with Widex a/s).
[18] M. B. Stensgaard. Design of an asynchronous communication network for an audio DSP chip. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2005. IMM-Thesis-2005-61.
[19] R. G. Olsen. OCP based adapter for network-on-chip. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2005. IMM-Thesis-2005-15.
[20] Xiaoshou Cai. Extremely low power fully synthesizable pree-add mulitply accumulate unit for a DSP. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2005. IMM-Thesis-2005-88 (Formal collaboration with GN ReSound Inc.).
[21] Andreas Vad Lorentzen. Low-power processors for the hogthrob project. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2004. IMM-Thesis-2004-91.
[22] J. P. Zhou. OCP Compliant Adapter for Network-on-chip. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2004. IMM-Thesis-2004-72.
[23] Mathias Nicolajsen Kjærgaard. Asynchronous implementation of virtual channals in on-chip networks. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2004. IMM-Thesis-2004-25.
[24] Thomas Christensen. On-chip netværk med prioriterede trafikklasser. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2003. IMM-Thesis-2003-37.
[25] Georgios Plakaris. Power efficient arithmetric circuits for application specific processors. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2003. IMM-Thesis-2003-29.
[26] K. Larsen. SoC system level integration. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2003. IMM-Thesis-2003-16.
[27] Y. Arnstein. Hardware-software co-design on a CPU-FPGA platform. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2002. IMM-Thesis-2002-10.
[28] K. A. Einarsson. A low-power DSP block for adaptive filtering. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2002. IMM-Thesis-2002-16 (Formal collaboration with Oticon Inc.).
[29] O. M. Christensen. Design and implementation of turbo-dekoder for radio communication. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2002. IMM-EKS-2002-46 (Formal collaboration with Thrane&Thrane Inc.).
[30] F. Maalik. Dynamic word-size adaptation in low power DSP processors. Master's thesis, Informatics and Mathematical Modelling, Technical University of Denmark, 2002. IMM-Thesis-2002-72.
[31] Jens-Peder Hammerstoft. Syntese af asynkrone kredsløb ud fra kontrol data flow grafer. IMM-Thesis-2001-44, Informatics and Mathematical Modelling, Technical University of Denmark, 2001.
[32] Niels Christian A. Haandbæk. Design and VLSI implementation of a dedicated low-power DSP circuit. Master's thesis, Dept. of Information Technology, Technical University of Denmark, July 2000. Report IT-E ???? (Formal collaboration with Oticon Inc.).
[33] Mogens Isager. Block level interconnect structures for low-power DSP chips. Master's thesis, Dept. of Information Technology, Technical University of Denmark, July 2000. Report no. IT-E ???? (Formal collaboration with Oticon Inc.).
[34] M. A. Hansen. Effektforhold ved implementering af DSP algoritmer i HW hhv. SW. Master's thesis, Department of Information Technology, Technical University of Denmark, 2000. IMM-Thesis-2000-?? (Formal collaboration with Nokia Danmark A/S).
[35] Jensen J. Schou. Højniveausyntese af asynkrone kredsløb. Master's thesis, Department of Information Technology, Technical University of Denmark, 2000. Report no. IT-T 831.
[36] R. Pereira. High performance bus structures for system on a chip. Master's thesis, Department of Information Technology, Technical University of Denmark, 2000. Report no. IT-E ???? (Formal collaboration with Nokia Danmark A/S).
[37] J. Carstensen. Asynchronous, high-speed, low-energy communication. Master's thesis, Department of Information Technology, Technical University of Denmark, February 1999. Report no. IT-E ???? (Formal Collaboration Ericsson Mobile Communications AB, Lund, Sweden).
[38] T. Bo Nielsen. Audio i/o modul - design af asynkron low-power decimering til delta-sigma konverter. Master's thesis, Department of Information Technology, Technical University of Denmark, February 1999. Report no. IT-E ???? (Formal collaboration with GN Danavox (now GN ReSound)).
[39] M. Lausten. Lav-effekt, lav-spændings cmos mac-kredsløb. Master's thesis, Department of Information Technology, Technical University of Denmark, February 1999. Report no. IT-E ???? (Formal collaboration with GN Danavox (now GN ReSound)).
[40] K. Rubak. Design af en generaliseret programmerbar i/0 enhed. Master's thesis, Department of Information Technology, Technical University of Denmark, 1999. Report no. IT-T 831.
[41] Sune Frankild. VHDL++ used for design of asynchronous digital circuits. Master's thesis, Department of Information Technology, Technical University of Denmark, 1999. Report IT-E 828.
[42] Özgün Paker. Low-power audio signal processor. Master's thesis, Department of Information Technology, Technical University of Denmark, 1998. Report IT-E ??? (Formal collaboration with Oticon A/S).
[43] Michael Pedersen. Design af asynkrone kredsløb vha. standard CAD værktøjer. Master's thesis, Department of Information Technology, Technical University of Denmark, 1998. Report IT-E 774.
[44] Kåre Tais Christensen and Peter Jensen. An Asynchronous Low Power RISC CPU. Master's thesis, Department of Information Technology, Technical University of Denmark, 1997. Report IT-E 749 (Formal collaboration with LSI Logic Denmark).
[45] Christian Scheel Vandel. Simpel internettilkobling til smarte hjem. Master's thesis, Department of Information Technology, Technical University of Denmark, 1997. Report no. IT-E ??? (Confidential).
[46] Peter Korger. Konstruktion af asynkrone kontrolkredsløb. Master's thesis, Department of Information Technology, Technical University of Denmark, 1996. Report no. IT-E 696.
[47] Morten Elo Pedersen. Power estimation for high level synthesis. Master's thesis, Department of Computer Science, Technical University of Denmark, 1995. Report ID-E 671.
[48] Kim Willi Schultze. Højhastigheds inter-chip kommunikation (English: High-speed inter-chip communication). Master's thesis, Department of Computer Science, Technical University of Denmark, 1995. ID-E 679.
[49] Jesper Frisgaard Hansen. Inputmodul til en 100 Mbit/sek Viterbi dekoder kreds. Master's thesis, Department of Computer Science, Technical University of Denmark, 1994. ID-E 622.
[50] Stig Rømer Rasmussen. Syntese af 3D-foldningsalgoritme fra VHDL beskrivelse. Master's thesis, Department of Computer Science, Technical University of Denmark, 1994. ID-E 621.
[51] Jens Ellerup Poulsen. Højhastighedsdesign af VLSI kredsløb. Master's thesis, Department of Computer Science, Technical University of Denmark, 1994. ID-E 611.
[52] Morten Bock. 100 mbit/sek acs-modul til viterbi dekoder chip. Master's thesis, Department of Computer Science, Technical University of Denmark, 1993. ID-E 584.
[53] Jakob Saxtorph. PSS modul til 100 Mbit/sek Viterbi dekoder chip. Master's thesis, Department of Computer Science, Technical University of Denmark, 1993. ID-E 601.
[54] Lars Skovby Nielsen. Design og evaluering af micropipeline kredsløb. Master's thesis, Department of Computer Science, Technical University of Denmark, 1992. Report ID-E 568.
[55] Erik Plesner. 'Self timed' kredse til digital signalbehandling (English: Delay insensitive circuits for digital signal processing). Master's thesis, Department of Computer Science, Technical University of Denmark, 1992. Report ID-E 561.
[56] Søren Rievers. Implementering af del af Reed-Solomon dekoder i VLSI (English: Implementation of Euclid’s algorithm in VLSI). Master's thesis, Department of Computer Science, Technical University of Denmark, 1991. Report ID-E 516.
[57] Michael Dantzer-Sørensen. VLSI implementering af regulære 'self-timed' strukturer. Master's thesis, Department of Computer Science, Technical University of Denmark, 1991. Report ID-E 518.
[58] Jens Fog Christensen and Ken Willen. Modulgenerator for RISC-processor til OCCAM. Master's thesis, Department of Computer Science, Technical University of Denmark, 1990. Report ID-E 502.
[59] Kim Engedahl. Højhastigheds CMOS-kredsløb i VLSI. Master's thesis, Department of Computer Science, Technical University of Denmark, 1989. Report ID-E 468 (In Danish).
[60] Niels Walentin Johansen. Implementering af CSP-kommunikation i VLSI. Master's thesis, Department of Computer Science, Technical University of Denmark, 1989. Report ID-E 469.
[61] K. Hansen and J.H. Jensen. Viterbi dekodning ved hastigheder over 10 Mbit/sek. Master's thesis, Department of Computer Science, Technical University of Denmark, 1989. Report ID-E 464.
[62] Peter Mose Andersen. VLSI-realisering af tilbagesøgningsmodul til viterbidekoder. Master's thesis, Department of Computer Science, Technical University of Denmark, 1989. Report ID-E 447.
[63] Lars Halling and Keld Pietraszek. Konstruktionsprincipper for asynkrone digitale systemer. Master's thesis, Department of Computer Science, Technical University of Denmark, 1988. Report ID-E 389.
[64] Henrik Nordtorp Jørgensen and Jesper Hartvig Jensen. 10 Mbit/sek Viterbi dekoder chip. Master's thesis, Department of Computer Science, Technical University of Denmark, 1988. Report ID-E 404.
[65] Jens C. Pedersen. Konstruktion af 'Self Timed' VLSI-systemer med lokalt klokkede elementer. Master's thesis, Department of Computer Science, Technical University of Denmark, 1988. Report ID-E 415.
[66] Flemming Jaller and Claus Ole Jensen. CSP baseret datanet. Master's thesis, Department of Computer Science, Technical University of Denmark, 1987. Report ID-E 347.
[67] Konstruktion af VLSI kreds til brug i interface til højhastigheds lokalt datanet. Master's thesis, Department of Computer Science, Technical University of Denmark, 1986. Report ID-E 319.
[68] Claus Dolleriis. Redesign af buffersystemet i et knudepunkt til LAN-DTH hovednettet. Master's thesis, Department of Computer Science, Technical University of Denmark, 1986. Report ID-E 338.
[69] Lars Zobbe Mortensen and Steen U. T. Hansen. Konstruktion af VLSI kreds til brug i interface til højhastigheds lokalt datanet. Master's thesis, Department of Computer Science, Technical University of Denmark, 1985. Report ID-E 282.
[70] Mogens Nordberg Jensen and Jesper Skavin. Interface til højhastigheds lokalt datanet. Master's thesis, Department of Computer Science, Technical University of Denmark, 1984. Report ID-E 257.
[71] Georg Lund Pedersen and Søren Ilsøe. Interface til højhastigheds lokalt datanet. Master's thesis, Department of Computer Science, Technical University of Denmark, 1984. Report ID-E 238.
[72] xxx. Konstruktion af LSI kredse v.hj.a. TILADS gate-array design systemet. Master's thesis, Department of Computer Science, Technical University of Denmark, 1984. Report ID-E 274.
[73] Ole Conradsen and Lester Martin. Datamaskine realiseret i 'Gate Array' teknologi. Master's thesis, Department of Computer Science, Technical University of Denmark, 1983. Report no. ID-E 218.
[74] Lars Christiansen. Syntese af forsinkelses-uafhængige kredsløb. Master's thesis, Department of Computer Science, Technical University of Denmark, 1982. Report ID-E 553.

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