DTU 02208

Course Description

02208 Test of Integrated Circuits
Plan for Lectures 18 through 20:
DFT of regular structures



Design for test becomes the issue, whenever test pattern generation is considered too complex or costly. The design for test problem can be formulated in terms of the questions
  • How can the testability of a circuit be quantified ?
  • How do we design testable circuits ?
  • How may we take advantage of regular structures ?
  • Can the circuit be designed to test itself ?
The complexity issue makes specific considerations necessary for design for test of embedded, regular structures. This subject is considered in these lectures.



Lecture 18: Design for test of regular structures : Memories

Purpose:
To discuss the test of memory structures
Contents:
Functional fault models for static RAMs
March algorithms: March-C- and March-B algorithms
Superlinear algorithms: GALDIAG, GALPAT, Walking 1/0
March-C- algorithm: fault coverage
Built-in transparent self-test for embedded memories
Literature:
329-346

Lecture 19: Design for test of regular structures : PLAs

Purpose:
To discuss the test of PLAs
Contents:
Functional fault models for PLAs
PLA Design for test: physical, electrical, and functional level
Universal test set PLA
Literature:
297-329

Lecture 20: Design for test of regular structures : C-testable structures

Purpose:
To discuss the test of iterative structures
Contents:
C-testability requirements
Constraints graphs
Example: Carry-save multiplier, Problem 7.4
Literature:
347-371

Associate professor Flemming Stassen, stassen@imm.dtu.dk