DTU 02208

Lecture Plan

02208 Test of Integrated Circuits
Lecture Plan Autumn '2
Date Topic Literature
3rd September
 
 
  		  Welcome to the course  
  1 Introduction to Test of IC's Chapter 1
Fault Modeling 2 Physical faults Chapter 2
6th September
 
 
 		 Fault Modeling
 		 3 Fault models Chapter 2
4 Inductive fault analysis Paper 1
Problem Solving Problems 1.1
10th September
 
 
 		 Test pattern generation
   		5 Boolean differences pp 43-76
6 The D-algorithm pp 43-76
Problem Solving Problems 2.1, 2.2, 2.3
13th September
 
 
 		 Student Presentation
 		 p1 Critical Path Tracing 1 Paper 3
p2 Critical Path Tracing 2 Paper 4
Problem Solving Problems 3.1, 3.2
17th September
 
 
 		 Test pattern generation 7 PODEM and FAN algorithms pp 43-76. Paper 2
Test evaluation 8 Fault simulation A Paper 5
Problem Solving Problems 3.3, 3.4
20th September
 
 
 		 Student Presentation
 		 p3 Built-In Current Testing (1) Paper 6
p4 Test Generation Using Iterative Array Models Paper 7
Problem Solving Problems 3.5, 3.6
24th September
 
 
 		 Test evaluation 9 Fault simulation B Paper 5
Testability analysis 10 Testability analysis pp 20-25, Paper 8
Problem Solving Problems 3.7, 3.8
27th September
 
 
 		 Student Presentation
 		 p5 Bridging fault modeling Paper 9
p6 Fault Simulation with PVL Algorithm Paper 10
Problem Solving Problems 4.1, 4.2
1st October
 
 
 		 Design for  test
 		 11 Ad-hoc techniques pp 201-206
12 Scan-based design pp 206-229
Problem Solving Problems 4.3, 5.1
4th October
 
 
 		 Student Presentation p7 Built-In Current Testing (2) Paper 11
p8 Cancelled  
Problem Solving Problems 5.2, 6.1
8th October
 
 
 		 Design for  test 13 Boundary scan pp 230-240
Problem Solving Problems 6.2, 6.3
11th October
 
 
 		 Student Presentation p9 Critical Path Tracing - An Alternative to Fault Simulation Paper 12
Problem Solving Problems 6.4, 6.5
14th through 18th October Autumn holidays
22nd October
 
 
 		 Built-in self-test
 		 14 Introduction 241-285
15 Signature analysis (1) 241-285
Problem Solving Problem 6.6
25th October
 
 
 		 Student Presentation p10 The X Algorithm Paper 13
Assignment 1 Delay test Notes
Problem Solving Problem 6.7
29th October
 
 
 		 Built-in self-test
 		 16 Signature analysis (2) 241-285
17 BIST planning Paper 15
Problem Solving Problem 6.8
1st November
 
 
 		 Student Presentation p11 Sequential Test Generation Paper 14
Assignment 2 Partial Scan Design Using IEEE 1149.1 Notes
Problem Solving Problem 8.1
5th November
 
 
 		 DFT of regular structures
 		 18 Memory structures 329-346
19 Programmable logic array's - PLAs 297-328
Problem Solving Problem 9.1
8th November
 
 
 		 Student Presentation p12 Concurrent Error Detection Paper 16
Assignment 3 Design for test of embedded microprocessors Notes
Problem Solving Problem 7.1-7.2
12th November
 
 
 		 DFT of regular structures 20 C-testable structures 347-371
Test pattern compaction 21 Test pattern compaction Paper 19
Problem Solving Problems 7.1-7.2
15th November
 
 
 		 Student Presentation p13 BIST for SOCs (1) Paper 17
Assignment 4 Bridging Faults Notes
Problem Solving Problems 7.3-7.4
19th November
 
 		 Test systems
 		 22 Tester architecture (1-12, 427-441)
23 Timing formating (1-12, 427-441)
Problem Solving Problems 10.1, 10.2
22nd November
 
 		 Student Presentation p14 BIST for SOCs (2) Paper 18
Problem Solving Problems 10.3, 10.4
26th November Test economy 24-25 477-509
29th November Student Presentation p15 Low-Power Testing Paper 20
3th December No lecture
6th December The Last Supper
[02208 homepage]       Modified by Flemming Stassen on 29 August 2002     stassen@imm.dtu.dk