MIPS R2000 Core

This is a SystemC design of a MIPS R2000 processor developed from scratch. The processor is a 32-bit RISC architecture with 32 general purpose registers. The specification supports 4 coprocessors, but only cp0 is implemented here. The MIPS core is synthesizable and has been tested on a Xilinx Spartan II FPGA development board.

Developers: Andreas Vad Lorentzen & Nicolai Ascanius Jørgensen.
Download: sc_mips_core.tar.gz

Setup of core

In order to execute the core, SystemC has to been installed. The SystemC distribution can be downloaded from systemc.org
SystemC requires GCC for the local platform. When compiling test programs or TinyOS for MIPS, a GCC distribution for the MIPS architecture is required.

TinyOS can be downloaded from the TinyOS homepage. The distribution requires GCC for AVR to compile.
A step-by-step guide for setting up the SystemC MIPS core with TinyOS can be found here.

Other download locations

RedHat packages of GCC for MIPS: Download here
Debian packages of GCC for MIPS: Download here
Zipped GTKWave distribution: Download here

Test programs

The MIPS core have been tested with a set of test programs compiled from C to assembly code with GCC. The programs test various things which should be self-explanatory from the name of the program or just by taking a glance at the code.

Download: test_programs_mips.tar.gz