14 March 2022

 

02204 Design of asynchronous circuits

 

General course information (Spring 2022)

 

 

The purpose of this document is to provide information about the course to prospective students and others interested in the course.  It is intended as a supplement to the course description in the DTU course catalogue. For the daily communication during the semester we use the DTU-campusnet, and therefore the course resources are only available to students registered for the course.

 

Asynchronous circuits

Asynchronous circuits are circuits that operate without a (single) global clock. Today almost all circuits of realistic complexity – including the processor in your laptop – are asynchronous according to this definition.

 

There are many ways of designing asynchronous circuits, and practical circuits often mix several approaches. Asynchronous circuits can be built using components that are internally clocked, and such circuits are called globally asynchronous locally synchronous (GALS) circuits. When designing GALS systems the key challenges are to safely handle flip-flop metastability in the interface circuitry of the individually clocked modules, and to optimize for low latency and high throughput. Asynchronous circuits can also be designed without any clocks at all. Instead, small hazard-free asynchronous sequential circuits that communicate using some form of handshake protocol are used to generate local clock ticks for the individual registers. It is even possible to design asynchronous circuits whose operation is completely insensitive to gate and wire delays.  In the course we will cover both fully asynchronous circuits and GALS-style circuits.

 

Advantages of asynchronous circuits

Clock distribution and clock skew are two increasingly difficult challenges that make system-wide synchronous operation almost impossible. Asynchronous design is an alternative approach which avoids these problems.   

 

Asynchronous circuits operate in a data-driven manner based on local handshaking between components. Asynchronous circuits have a number of characteristics and potential advantages some of which are:

–     The fact that the individual registers are only clocked when and where necessary, can be exploited to reduce power consumption.

–     The fact that registers are clocked at “random” points in time tends to reduce spikes in the supply current and in the electromagnetic noise emitted from the circuit.

–     The fact that components use interface protocols with explicit timing protocols (rather than assuming an implicit global clock) increases modularity and robustness towards timing variability, and it can simplify the problem related to system-level timing closure.

–     The fact that components indicate completion may lead to average case performance rather than worst case performance.

 

Aim of the course

Asynchronous design requires a different mental approach from that normally employed in clocked design, and attempts to take an existing clocked system and take out the clock and simply replace it with asynchronous handshaking is doomed to disappoint. 

 

The aim of the course is to introduce the participants to asynchronous circuit design. The course will motivate the use of asynchronous circuits and teach the basic theory and concepts, such that the participants will be able to:

–        Design asynchronous control- and data processing circuits of small and medium complexity.

–        Read and understand the literature.

–        Use typical CAD tools for asynchronous design.

–        Decide where/whether to use asynchronous circuits in their next design.

–        Design and analyze GALS interface circuits

 

Instructor.

Professor Jens Sparsø

 

Lectures and Labs:

Mondays 13h:00-17h:00.  Lectures are in building 3524 room 019.

Tentative lecture plan, spring 2022        (last updated 14 March 2022)

 

Week

#

Date

Topic

Reading

Problems

    /Project

5

31 January

Introduction + theory

[1] Ch. 1+2

Prob. 1, 2, 3.

6

7 February

Theory + data flow

[1] Ch 2+3

Prob.

7

14  February

Performance (qualitative)

Basic circuit implementation

[1] Ch. 4 + 5

Prob.

8

21  February

Signal Transition Graphs

Control circuits synthesis

using WorkCraft

[1] Ch. 6

+ WorkCraft

Prob.

9

 

28 February

No Lecture

Work on your problem portfolio (problems 1 – 14)

 

Prob.

10

7 March

Performance analysis using timed Petri nets

[1] Ch. 7

 

Prob.

 

11

14 March

Metastability, synchronization and GALS

[1] Ch. 8

Article [1]

Prob.

Introduction of project topics

12

21 March

 

Advanced protocols and circuits.

Two-phase bundled data

[1] Ch. 9 +10

(Background Articles [3–5])

Prob./Project

 

13

28 March

 

High level design (Syntax directed translation)

[1] Ch. 11

Prob./project

Problem portfolio due

14

4 april

Asynchronous NOCs.

 - ARGO

Articles [6–8]

 

15

11 April

Easter vacation

 

 

16

18 April

Easter vacation

 

 

17

25 April

Desynchronization

 

 

Article [9]

Project

18

2 May

T.B.D.

 

Project

 

19

9 May

Course wrap up

 

Project

 

 

 

 

Project report due 12 May

 

Course material

·         Textbook;   J. Sparsø, Introduction to Asynchronous Circuit design (Kindle Direct Publishing, 2022). Chapters 1-11, pages 1-255.

     

[2]   R. Ginosar, “Metastability and Synchronizers: A Tutorial”, IEEE Design & Test of Computers, vol. 28. No. 5, pp. 23-35, October 2011.

[3]   A. Mardari, Z. Jelcicova and J. Sparsø, “Design and FPGA-implementation of asynchronous circuits using two-phase handshaking”, Proc. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 9-18, 2019.

[4]   M. Singh and S.M: Nowick, “MOUSETRAP: High-Speed Transition-Signaling Asynchronous Pipelines”, IEEE Trans. Very Large Scale Integration (VLSI) Systems, Volume 15, Issue 6, pp. 684-698, 2007.

[5]   A. Peeters, F. te Beest, M. de Wit, W. Mallon, “Click Elements - An Implementation Style for Data-Driven Compilation”, Proc. IEEE Symposium on Asynchronous Circuits and Systems, pp.3-14, 2010

[6]   E. Kasapaki, J. Sparsø, “A Time-Elastic Time-Division-Multiplexed NOC using Asynchronous Routers”. Proc. IEEE International Symposium on Asynchronous Circuits and Systems, pp. 45-52, 2014.

[7]   E. Kasapaki, J. Sparsø, “The Argo NOC: Combining TDM and GALS”, Proc. European Conference on Circuit Theory and Design (ECCTD), 4 pages,  2015.

[8]   E. Kasapaki, M. Schoeberl, R.B. Sørensen, C. Müller, K. Goossens, and J. Sparsø, "Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol: 24, issue: 2, pages: 479-492, 2016.

[9]   J. Carmona, J. Cortadella, M. Kishinevsky, A. Taubin, “Elastic Circuits”, Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28, No. 10, pp.1437-1455.

[10]                       More may be added later

 

 

–        WorkCraft www.workcraft.org

 

 

Supplementary material:

Some books or book chapters for those interested in exploring more:

 

Exam

There is no exam. The grade will be based on a portfolio consisting of

 

Web resources

 

–        WorkCraft: https://workcraft.org/ (includes Petrify)

Other tools (Just for your information we don’t use them):

–        “CaSCADE package”:  http://www.cs.columbia.edu/~nowick/asynctools/

–        PETRIFY:  http://www.lsi.upc.edu/~jordicf/gavina/asynchronous.html

Clicking on “petrify” in the text takes you to the download site.

–        Asynchronous VLSI tools:  Link given on Rajit Manohar’s web page http://csl.yale.edu/~rajit/ (CHP / Caltech style design)

 

–        IEEE Intl. Symposium on Asynchronous Circuits and Systems. www.asyncsymposium.org