Design of Self-timed Multipliers: A Comparison

Sparsø, Jens ; Nielsen, Christian Dalsgaard ; Nielsen, Lars Skovby ; Staunstrup, Jørgen ; Furber, S. ; Edwards, M.

part of: Asynchronous Design Methodologies, pages: 165-180, 1993, Elsevier Science Publishers,

Type: Article in proceedings - Article in proceedings

Presented at: Asynchronous Design Methodologies

Design and performance analysis of delay insensitive multi-ring structures

Sparsø, Jens ; Staunstrup, Jørgen

part of: Proceeding of the 26th Hawaii International Conference on System Sciences (ISBN: 08-18-63230-5), pages: 349-358, 1993, IEEE,

Type: Article in proceedings - Article in proceedings

Presented at: Hawaii International Conference on Systems Sciences, Hawaii, US

DOI: 10.1109/HICSS.1993.270630

Design and development of a very high speed Reed-Solomon encoder/decoder chip set: Architectural design report

Baudin, F. ; Klootsema, R. ; Rievers, Søren ; Dijkstra, E. D. ; Paaske, Erik ; Justesen, Jørn ; Larsen, Knud J. ; Sparsø, Jens ; Pedersen, Steen

Type: Report - Report

Design and Performance Analysis of Delay-Insensitive Multi-Ring Structures

Sparsø, Jens ; Staunstrup, Jørgen

Type: Report - Report

Design and development of a very high speed Reed-Solomon encoder/decoder chip set: Requirement analysis.

Bauduin, F. ; Klootsema, R. ; Rievers, S. ; Dijkstra, E. D. ; Paaske, E. ; Justesen, J. ; Larsen, K. ; Sparsø, Jens ; Pedersen, S.

Type: Report - Report

Design of delay insensitive circuits using multi-ring structures

Sparsø, Jens ; Staunstrup, Jørgen ; Dantzer-Sørensen, Michael

part of: Proceedings of European Design Automation Conference (ISBN: 08-18-62780-8), pages: 15-20, 1992, IEEE,

Type: Article in proceedings - Article in proceedings

Presented at: European Design Automation Conference, Hamburg

DOI: 10.1109/EURDAC.1992.246271

An area-efficient path memory structure for VLSI Implementation of high speed Viterbi decoders

Paaske, Erik ; Pedersen, Steen ; Sparsø, Jens

in journal: Integration, the VLSI journal (ISSN: 0167-9260), vol: 12, issue: 2, pages: 79-91, 1991

Type: Journal article - Journal article

Struktureret konstruktion af digitale ASIC's

Pedersen, Steen ; Sparsø, Jens

Type: Compendium/lecture notes - Compendium/lecture notes

Design of a Fully Parallel Viterbi Decoder

Sparsø, Jens ; Pedersen, Steen ; Paaske, Erik

part of: Proc. of VLSI91, IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, pages: 29-39, 1991, North-Holland,

Type: Article in proceedings - Article in proceedings

Presented at: Proc. of VLSI91, IFIP TC10/WG10.5 International Conference on Very Large Scale Integration

An area-efficient topology for VLSI implementation of Viterbi decoders and other shuffle-exchange type structures

Sparsø, Jens ; Jørgensen, Henrik Nordtorp ; Paaske, Erik ; Pedersen, Steen ; Rübner-Petersen, Torben

in journal: IEEE Journal of Solid State Circuits (ISSN: 0018-9200) (DOI: http://dx.doi.org/10.1109/4.68122), vol: 26, issue: 2, pages: 90-97, 1991

Type: Journal article - Journal article

DOI: 10.1109/4.68122

An Area-Efficient Topology for VLSI Implementation of Viterbi Decoders and other Shuffle-Exchange Type Structures

Sparsø, Jens ; Jørgensen, Henrik N. ; Paaske, Erik ; Pedersen, Steen ; Rübner-Petersen, Thomas

Type: Report - Report

Experiences from the design of a large VLSI chip

Pedersen, Steen ; Sparsø, Jens

part of: Proc. of NORCHIP/NORSILC seminar, Lund, October 30-November 1, 1990,

Type: Article in proceedings - Article in proceedings

Presented at: Proc. of NORCHIP/NORSILC seminar, Lund, October 30-November 1

A Fully Parallel VLSI-implementation of the Viterbi Decoding Algorithm

Sparsø, Jens ; Jørgensen, Henrik Nordtorp ; Paaske, Erik ; Pedersen, Steen ; Rübner-Petersen, Thomas

Type: Report - Report

Design and implementation of a full-custom single chip Viterbi decoder

Jørgensen, Henrik N. ; Paaske, Erik ; Pedersen, Steen ; Sparsø, Jens

part of: Proc. of NORCHIP/NORSILC seminar, Stockholm, October 23-24, 1989,

Type: Article in proceedings - Article in proceedings

Presented at: Proc. of NORCHIP/NORSILC seminar, Stockholm, October 23-24, Stockholm

A Fully Parallel VLSI-implementation of the Viterbi Decoding Algorithm

Sparsø, Jens ; Jørgensen, Henrik Nordtorp ; Paaske, Erik ; Pedersen, Steen ; Rübner-Petersen, Thomas

part of: Proceedings of the 15th European Solid-State Circuits Conference (ISBN: 3-85403-101-7), pages: 232-235, 1989, IEEE,

Type: Article in proceedings - Article in proceedings

Presented at: 15th European Solid-State Circuits Conference, Vienna

Hardware Architecture of a Node for the LAN-DTH High Speed Token Ring

Jensen, Mogens Nordberg ; Skov, Morten ; Sparsø, Jens

part of: Proc. of EFOC/LAN'87 - Fifth Annual European Fibre Optic Communications and Local Aera Networks Conference, pages: 214-219, 1987,

Type: Article in proceedings - Article in proceedings

Presented at: Proc. of EFOC/LAN'87 - Fifth Annual European Fibre Optic Communications and Local Aera Networks Conference

A POLYNET to VME-bus Interface Unit - Block diagram and principles of oparation

Sparsø, Jens

Type: Report - Report

Hardware Architecture of a Node for the LAN-DTH High Speed Token Ring

Sparsø, Jens

Type: Report - Report

LAN-DTH - A Hierarchical Local Area Network based on a High Speed Optic Token Ring

Jensen, Mogens Nordberg ; Sharp, Robin Ian ; Skov, Morten ; Sparsø, Jens

part of: Proc.of IFIP TC6/WG6.4 International In Depth Symposium on Local Communication Systems LAN and PBX, pages: 339-351, 1986,

Type: Article in proceedings - Article in proceedings

Presented at: Proc.of IFIP TC6/WG6.4 International In Depth Symposium on Local Communication Systems LAN and PBX