| Title:
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Power Efficient Division and Square Root Unit |
| Type:
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Journal articleJournal article |
| Participant(s):
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Politecnico di Torino, Torino
Email:
Technical University of Denmark, Lyngby
Email:
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| Abstract:
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Although division and square root are not frequent operations, most processors implement them in hardware to not compromise the overall performance. Two classes of algorithms implement division or square root: digit-recurrence and multiplicative (e.g., Newton-Raphson) algorithms. Previous work shows that division and square root units based on the digit-recurrence algorithm offer the best tradeoff delay-area-power. Moreover, the two operations can be combined in a single unit. Here, we present a radix-16 combined division and square root unit obtained by overlapping two radix-4 stages. The proposed unit is compared to similar solutions based on the digit-recurrence algorithm and it is compared to a unit based on the multiplicative Newton-Raphson algorithm. |
| Published:
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in journal: I E E E Transactions on Computers (ISSN: 0018-9340) (DOI: http://dx.doi.org/10.1109/TC.2012.82), vol: 61, issue: 8, pages: 1059-1070, 2012 |
| DOI:
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